PDM-IR SDK  3.1.0
PDM-IR_SDK
PDM-IR_TB.h
1 /*
2 #######################################
3 
4 Copyright 2017 Micro-Photon-Devices s.r.l.
5 
6 SOFTWARE PRODUCT: PDM-IR_SDK
7 
8 Micro-Photon-Devices (MPD) expressly disclaims any warranty for the SOFTWARE PRODUCT.
9 The SOFTWARE PRODUCT is provided 'As Is' without any express or implied warranty of any kind,
10 including but not limited to any warranties of merchantability, noninfringement, or
11 fitness of a particular purpose. MPD does not warrant or assume responsibility for the
12 accuracy or completeness of any information, text, graphics, links or other items contained
13 within the SOFTWARE PRODUCT. MPD further expressly disclaims any warranty or representation
14 to Authorized Users or to any third party.
15 In no event shall MPD be liable for any damages (including, without limitation, lost profits,
16 business interruption, or lost information) rising out of 'Authorized Users' use of or inability
17 to use the SOFTWARE PRODUCT, even if MPD has been advised of the possibility of such damages.
18 In no event will MPD be liable for loss of data or for indirect, special, incidental,
19 consequential (including lost profit), or other damages based in contract, tort
20 or otherwise. MPD shall have no liability with respect to the content of the
21 SOFTWARE PRODUCT or any part thereof, including but not limited to errors or omissions contained
22 therein, libel, infringements of rights of publicity, privacy, trademark rights, business
23 interruption, personal injury, loss of privacy, moral rights or the disclosure of confidential
24 information.
25 
26 #######################################
27 */
28 #ifndef __PDM_IR_TB_h__
29 #define __PDM_IR_TB_h__
30 
31 #include "PDM-IR_SDK.h"
32 
33 #ifdef __cplusplus
34 extern "C" {
35 #endif
36 
37 
43 
44 typedef enum {
45  Calibration_NoCal = 0,
46  Calibration_StartGateWidthCal = 177,
47  Calibration_StartSpadCal = 178,
48  Calibration_StartThCal = 180,
49  Calibration_StartDelayTriggerInCal = 181,
50  Calibration_StartDelayTriggerAuxCal = 182,
51  Calibration_StartDelayTTLOutCal = 183,
52  Calibration_StartDelayNIMOutCal = 184,
53  Calibration_StartDelayEffectiveGateCal = 185,
54  Calibration_StartDelayTriggerInternalCal = 186,
55  Calibration_StartDCRGated = 189,
56  Calibration_StartDCRFR = 190,
57  Calibration_StartIRFGated = 170, //not used for start calibration
58  Calibration_StartIRFFR = 171, //not used for start calibration
59  Calibration_StartSignalCheck = 172, //not used for start calibration
60  Calibration_GateOpt = 173 //not used for start calibration
61 }Calibration_e;
62 
63 typedef enum {
64  CalibrationStatus_ToDo = 0,
65  CalibrationStatus_Done = 1,
66  CalibrationStatus_Running = 2
67 }CalibrationStatus_e;
68 
69 typedef struct {
70  CalibrationStatus_e DelayTriggerIn;
71  CalibrationStatus_e DelayTriggerAux;
72  CalibrationStatus_e DelayTTL;
73  CalibrationStatus_e DelayNIM;
74  CalibrationStatus_e DelayEffectiveGate;
75  CalibrationStatus_e DelayTriggerInternal;
76  CalibrationStatus_e DelayGate;
77  CalibrationStatus_e SignalCheck;
78  CalibrationStatus_e SPAD;
79  CalibrationStatus_e ThresholdOpt;
80  CalibrationStatus_e GateOpt;
81  CalibrationStatus_e DCRgated;
82  CalibrationStatus_e DCRfreeRunning;
83  CalibrationStatus_e IRFgated;
84  CalibrationStatus_e IRFfreeRunning;
86 
87 typedef struct {
88  char DelayTriggerIn[48];
89  char DelayTriggerAux[48];
90  char DelayTTL[48];
91  char DelayNIM[48];
92  char DelayEffectiveGate[48];
93  char DelayTriggerInternal[48];
94  char DelayGate[48];
95  char SignalCheck[48];
96  char SPAD[48];
97  char ThresholdOpt[48];
98  char GateOpt[48];
99  char DCRgated[48];
100  char DCRfreeRunning[48];
101  char IRFgated[48];
102  char IRFfreeRunning[48];
104 
105 
109 typedef struct {
110  unsigned int Fpga;
111  unsigned int Board;
112  float caseTEC;
114 
115 
116 typedef enum {
121 
125 typedef struct {
135 }MODULESTATUS;
136 
137 typedef enum {
138  HW_FPGA_ADDR = 32,
139 
140  MAX10_TEMP_OFFSET_ADDR = 64,
141 
142  CAL_SIGNALCHECK = 129,
143  CAL_SPAD_DONE_ADDR = 130,
144  CAL_TH_DONE_ADDR = 131,
145  CAL_DELAY_TRIN_DONE_ADDR = 132,
146  CAL_DELAY_TRAUX_DONE_ADDR = 133,
147  CAL_DELAY_TTL_DONE_ADDR = 134,
148  CAL_DELAY_NIM_DONE_ADDR = 135,
149  CAL_DELAY_EFFGATE_DONE_ADDR = 136,
150  CAL_DELAY_TRINT_DONE_ADDR = 137,
151  CAL_GATE_DONE_ADDR = 138,
152  CAL_DCRGATED_DONE_ADDR = 139,
153  CAL_DCRFR_DONE_ADDR = 140,
154  CAL_LASERGATED_DONE_ADDR = 141,
155  CAL_LASERFR_DONE_ADDR = 142,
156  CAL_GATE_OPT_DONE_ADDR = 143,
157  SPADNAME_ADDR = 144,
158 
159  CAL_GW_ADDR = 512,
160  CAL_GW_GAIN_ADDR = 1024,
161  CAL_GW_OFFSET_ADDR = 1028,
162  CAL_GW_OFFSET_CUSTOM_ADDR = 1032,
163 
164  OPT_GATE_1ns_2V5_ADDR = 1040,
165  OPT_GATE_2ns_2V5_ADDR = 1042,
166  OPT_GATE_3ns_2V5_ADDR = 1044,
167  OPT_GATE_4ns_2V5_ADDR = 1046,
168  OPT_GATE_5ns_2V5_ADDR = 1048,
169  OPT_GATE_6ns_2V5_ADDR = 1050,
170  OPT_GATE_7ns_2V5_ADDR = 1052,
171  OPT_GATE_8ns_2V5_ADDR = 1054,
172  OPT_GATE_9ns_2V5_ADDR = 1056,
173  OPT_GATE_10ns_2V5_ADDR = 1058,
174 
175  OPT_GATE_1ns_5V0_ADDR = 1060,
176  OPT_GATE_2ns_5V0_ADDR = 1062,
177  OPT_GATE_3ns_5V0_ADDR = 1064,
178  OPT_GATE_4ns_5V0_ADDR = 1066,
179  OPT_GATE_5ns_5V0_ADDR = 1068,
180  OPT_GATE_6ns_5V0_ADDR = 1070,
181  OPT_GATE_7ns_5V0_ADDR = 1072,
182  OPT_GATE_8ns_5V0_ADDR = 1074,
183  OPT_GATE_9ns_5V0_ADDR = 1076,
184  OPT_GATE_10ns_5V0_ADDR = 1078,
185 
186  OPT_GATE_1ns_7V0_ADDR = 1080,
187  OPT_GATE_2ns_7V0_ADDR = 1082,
188  OPT_GATE_3ns_7V0_ADDR = 1084,
189  OPT_GATE_4ns_7V0_ADDR = 1086,
190  OPT_GATE_5ns_7V0_ADDR = 1088,
191  OPT_GATE_6ns_7V0_ADDR = 1090,
192  OPT_GATE_7ns_7V0_ADDR = 1092,
193  OPT_GATE_8ns_7V0_ADDR = 1094,
194  OPT_GATE_9ns_7V0_ADDR = 1096,
195  OPT_GATE_10ns_7V0_ADDR = 1098,
196 
197  OPT_GATE_11ns_ADDR = 1100,
198  OPT_GATE_OFFSET_ADDR = 1146,
199 
200  DELAY_TRIN_CAL_ADDR = 1152,
201  DELAY_AUXIN_CAL_ADDR = 1408,
202  DELAY_TTLOUT_CAL_ADDR = 1664,
203  DELAY_NIMOUT_CAL_ADDR = 1920,
204  DELAY_EFFGATE_CAL_ADDR = 2176,
205  DELAY_TRINTERNAL_CAL_ADDR=2560,
206 
207  VBD_THIGH_ADDR = 2432,
208  VBD_TMEDIUM_ADDR = 2436,
209  VBD_TLOW_ADDR = 2440,
210  VBD_TLOWEST_ADDR = 2444,
211 
212  SPAD_TYPE_ADDR = 2448,
213 
214  THIGH_ADDR = 2450,
215  TMEDIUM_ADDR = 2454,
216  TLOW_ADDR = 2458,
217  TLOWEST_ADDR = 2462,
218 
219  Th_dummy = 2828,
220 
221  ThGATED_2V0 = 2816,
222  ThGATED_2V5 = 2817,
223  ThGATED_3V0 = 2818,
224  ThGATED_3V5 = 2819,
225  ThGATED_4V0 = 2820,
226  ThGATED_4V5 = 2821,
227  ThGATED_5V0 = 2822,
228  ThGATED_5V5 = 2823,
229  ThGATED_6V0 = 2824,
230  ThGATED_6V5 = 2825,
231  ThGATED_7V0 = 2826,
232 
233  ThFR = 2830,
234 
235  ARRAY_DELAY_CAL_TRIN_ADDR = 2900,
236  ARRAY_DELAY_CAL_TRIN_NAME_ADDR = ARRAY_DELAY_CAL_TRIN_ADDR + 2050,
237  ARRAY_DELAY_CAL_TRAUX_ADDR = 5000,
238  ARRAY_DELAY_CAL_TRAUX_NAME_ADDR = ARRAY_DELAY_CAL_TRAUX_ADDR + 2050,
239  ARRAY_DELAY_CAL_TTLOUT_ADDR = 7100,
240  ARRAY_DELAY_CAL_TTLOUT_NAME_ADDR = ARRAY_DELAY_CAL_TTLOUT_ADDR + 2050,
241  ARRAY_DELAY_CAL_NIMOUT_ADDR = 9200,
242  ARRAY_DELAY_CAL_NIMOUT_NAME_ADDR = ARRAY_DELAY_CAL_NIMOUT_ADDR + 2050,
243  ARRAY_DELAY_CAL_EFFGATE_ADDR = 11300,
244  ARRAY_DELAY_CAL_EFFGATE_NAME_ADDR = ARRAY_DELAY_CAL_EFFGATE_ADDR + 2050,
245  ARRAY_DELAY_CAL_TRINT_ADDR = 13400,
246  ARRAY_DELAY_CAL_TRINT_NAME_ADDR = ARRAY_DELAY_CAL_TRINT_ADDR + 2050,
247  ARRAY_GATE_CAL_ADDR = 15500,
248  ARRAY_GATE_CAL_NAME_ADDR = ARRAY_GATE_CAL_ADDR + 2050,
249  ARRAY_THOPT_CAL_ADDR = 17600,
250  ARRAY_THOPT_CAL_NAME_ADDR = ARRAY_THOPT_CAL_ADDR + 2050,
251  ARRAY_DCRGATED_CAL_ADDR = 20000,
252  ARRAY_DCRGATED_CAL_NAME_ADDR = ARRAY_DCRGATED_CAL_ADDR + 2050,
253  ARRAY_DCRFR_CAL_ADDR = 22100,
254  ARRAY_DCRFR_CAL_NAME_ADDR = ARRAY_DCRFR_CAL_ADDR + 2050,
255  DCRGATED_SETUP_ADDR = 24200,
256  DCRFR_SETUP_ADDR = 26600,
257  SIGNALCHECK_NAME_ADDR = 29000,
258  GATE_OPT_NAME_ADDR = 30200,
259  GATE_OPT_CAL_ADDR = 29100,
260  IRFFR_CAL_NAME_ADDR = 38200,
261  IRFGATED_CAL_NAME_ADDR = 46200
262 } FPGA_EE_e;
263 
264 
266 DllSDKExport RESULT PDMIR_GetModuleStatusTB(UINT16 serialNumber, MODULESTATUS *status);
267 
268 DllSDKExport RESULT PDMIR_SetMappingMode(UINT16 serialNumber);
269 DllSDKExport RESULT PDMIR_ResetMicro(UINT16 serialNumber);
270 DllSDKExport RESULT PDMIR_EnterBootloader(UINT16 serialNumber);
271 
272 DllSDKExport RESULT PDMIR_SaveEE8bit_FPGA(UINT16 serialNumber, UINT16 pos, UINT8 value);
273 DllSDKExport RESULT PDMIR_SaveEE16bit_FPGA(UINT16 serialNumber, UINT16 pos, UINT16 value);
274 DllSDKExport RESULT PDMIR_SaveEE32bit_FPGA(UINT16 serialNumber, UINT16 pos, UINT32 value);
275 DllSDKExport RESULT PDMIR_SaveEE128bit_FPGA(UINT16 serialNumber, UINT16 pos, UINT8 *value);
276 DllSDKExport RESULT PDMIR_SaveEE8bit_MCU(UINT16 serialNumber, UINT16 pos, UINT8 value);
277 DllSDKExport RESULT PDMIR_SaveEE16bit_MCU(UINT16 serialNumber, UINT16 pos, UINT16 value);
278 DllSDKExport RESULT PDMIR_SaveEE32bit_MCU(UINT16 serialNumber, UINT16 pos, UINT32 value);
279 DllSDKExport RESULT PDMIR_SaveEE128bit_MCU(UINT16 serialNumber, UINT16 pos, UINT8 *value);
280 DllSDKExport RESULT PDMIR_ClearEE(UINT16 serialNumber);
281 DllSDKExport RESULT PDMIR_ReadEE8bit_FPGA(UINT16 serialNumber, UINT16 pos, UINT8 *value);
282 DllSDKExport RESULT PDMIR_ReadEE16bit_FPGA(UINT16 serialNumber, UINT16 pos, UINT16 *value);
283 DllSDKExport RESULT PDMIR_ReadEE32bit_FPGA(UINT16 serialNumber, UINT16 pos, UINT32 *value);
284 DllSDKExport RESULT PDMIR_ReadEE128bit_FPGA(UINT16 serialNumber, UINT16 pos, UINT8 *value);
285 DllSDKExport RESULT PDMIR_ReadEE8bit_MCU(UINT16 serialNumber, UINT16 pos, UINT8 *value);
286 DllSDKExport RESULT PDMIR_ReadEE16bit_MCU(UINT16 serialNumber, UINT16 pos, UINT16 *value);
287 DllSDKExport RESULT PDMIR_ReadEE32bit_MCU(UINT16 serialNumber, UINT16 pos, UINT32 *value);
288 DllSDKExport RESULT PDMIR_ReadEE128bit_MCU(UINT16 serialNumber, UINT16 pos, UINT8 *value);
289 
290 DllSDKExport RESULT PDMIR_GetCalibrationsStatus(UINT16 serialNumber, Calibration_s *value);
291 DllSDKExport RESULT PDMIR_GetCalibrationRunning(UINT16 serialNumber, Calibration_e *cal);
292 
293 DllSDKExport RESULT PDMIR_StartCalibration(UINT16 serialNumber, Calibration_e cal);
294 DllSDKExport RESULT PDMIR_GetMappingArrayAtPos(UINT16 serialNumber, UINT16 pos, UINT32 *value);
295 DllSDKExport RESULT PDMIR_GetMappingArray(UINT16 serialNumber, UINT32 *value);
296 
297 DllSDKExport RESULT PDMIR_GetCalibrationsFileName(UINT16 serialNumber, Calibration_e cal, char *name);
298 DllSDKExport RESULT PDMIR_SaveCalibrationsFileName(UINT16 serialNumber, Calibration_e cal, char *name);
299 
300 DllSDKExport RESULT PDMIR_GetCalibrationsStoredArray(UINT16 serialNumber, Calibration_e cal, UINT32 *data);
301 DllSDKExport RESULT PDMIR_GetCalibrationsFittedArray(UINT16 serialNumber, Calibration_e cal, UINT32 *data);
302 
303 DllSDKExport int PDMIR_fwUpdate(UINT16 serialNumber, char *srcPath);
306 #ifdef __cplusplus
307 }
308 #endif
309 
310 #endif //__PDM_IR_SDK_h__
The case TEC is in steady state.
Definition: PDM-IR_TB.h:119
The case TEC is not present.
Definition: PDM-IR_TB.h:117
STATUSBITS
Parameter Status enum.
Definition: PDM-IR_SDK.h:215
STATUSBITS StatusBitVpol
Indicates the polarization Voltage status.
Definition: PDM-IR_TB.h:129
STATUSBITS StatusBitAmpi
Indicates the Excess Bias status.
Definition: PDM-IR_TB.h:130
UINT32 ErrorStatus
Indicates if there are some error in the module.
Definition: PDM-IR_TB.h:134
STATUSBITS StatusBitGate
Indicates the Gate status.
Definition: PDM-IR_TB.h:131
unsigned int Fpga
The Digital core temperature.
Definition: PDM-IR_TB.h:110
STATUSCASETEC
Definition: PDM-IR_TB.h:116
unsigned short UINT16
16 bit signed definition
Definition: PDM-IR_SDK.h:85
Definition: PDM-IR_TB.h:87
The case TEC is cooling down the device.
Definition: PDM-IR_TB.h:118
unsigned int Board
The PDM-IR temperature.
Definition: PDM-IR_TB.h:111
Module Status Structure.
Definition: PDM-IR_TB.h:125
PDM-IR software development kit.
unsigned int UINT32
32 bit unsigned definition
Definition: PDM-IR_SDK.h:87
unsigned char UINT8
8 bit unsigned definition
Definition: PDM-IR_SDK.h:81
DllSDKExport int PDMIR_fwUpdate(UINT16 serialNumber, char *srcPath)
Update the firmware on the PDM–IR.
STATUSCASETEC StatusCaseTEC
Indicates the case TEC status.
Definition: PDM-IR_TB.h:132
STATUSBITS StatusBitModule
Indicates if the SPAD is on.
Definition: PDM-IR_TB.h:127
Definition: PDM-IR_TB.h:69
STATUSWARMUP StatusWarmUp
Indicates the Warm Up status.
Definition: PDM-IR_TB.h:133
RESULT
Error table enum.
Definition: PDM-IR_SDK.h:93
Temperature Structure.
Definition: PDM-IR_TB.h:109
STATUSWARMUP
Warming Up module enum.
Definition: PDM-IR_SDK.h:228
Temperature_s Temperature
The PDM-IR temperatures.
Definition: PDM-IR_TB.h:126
float caseTEC
The temperature of thecase of the PDM-IR.
Definition: PDM-IR_TB.h:112
STATUSBITS StatusBitTEC
Indicates the TEC status.
Definition: PDM-IR_TB.h:128